Bipolar junction transistors (BJTs) are commonly formed in integrated circuits along side with complementary metal oxide semiconductor (CMOS) devices. Such simultaneous manufacturing of these two different types of devices is sometimes referred to in the relevant art as a BICMOS process. In a BICMOS process, one or more isolation structures are typically formed within a substrate to electrically isolate the bipolar device from the CMOS device. Once the isolation structures are formed, the BICMOS process continues to complete the manufacturing of the CMOS and bipolar devices.
With regard to the manufacturing of the BJT device, typically the process entails forming a buried collector region within the substrate, forming an intrinsic base layer over the buried collector region above the substrate, forming a sacrificial emitter structure above the intrinsic base layer, forming an extrinsic base layer over the intrinsic base layer which is self-aligned to the sacrificial emitter feature, removing the sacrificial emitter structure, and forming the permanent emitter structure. The sacrificial emitter structure is formed for the purpose of forming a self-aligned extrinsic base layer. Once the extrinsic base layer is formed, the sacrificial emitter structure can be removed.
In removing the sacrificial emitter structure, the typical BICMOS process consists of using standard photolithography or chemical-mechanical polishing (CMP) techniques to remove the sacrificial emitter structure. Such techniques are rather expensive, time-consuming, and complex.
Thus, there is a need for a new method of removing a sacrificial emitter feature in a BICMOS process which is less expensive, time-consuming, and/or less complex. Such need and others are met with the following described method of removing a sacrificial emitter feature in a BICMOS process in accordance with the invention.